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Representative Patents Written by Brad Forrest
Computer Hardware, Software and Architecture
- US Patent No. 4,649,473 - Flexible Data Transmission for Message Based Protocols
An interprocess data transfer facility provides transfer of data between two processes. Work requests are represented by notes that are placed on a queue of a server process for performing the work. The requester process which created a work request does not transfer the work request from storage it controls until requested by the server. The actual transfer of the work request occurs without interaction of the requester. The use of notes which represent the work requests permits complex queuing of notes and hence handling of the request in the order desired by the server.
- US Patent No. 5,179,699 - Partitioning of Sorted Lists for Multiprocessor Sort and Merge
Any number of sorted lists are efficiently partitioned into P lists, where P represents the number of processors available to sort the resulting lists. When given a large list to sort, the list is initially divided into P lists, and each processor sorts one of these lists. The lists are then exactly partitioned so that each of the elements in the new consecutive partitioned lists have values no smaller than any of the elements in the lists before it, nor larger than any of the elements in the list following it. Partitioning is done by P-1 processors. Each of the processors successively considers selected rows of elements from the sorted lists, and moves a partition boundary based on an element magnitude requirement and a partition size requirement. The new partitioned lists are then merged by the P processors, and simply strung together to provide a sorted list of all the elements.
- US Patent No. 5650831 - Adjustable Power Remote Control Device
Multiple radio frequency remote control devices have power adjusting capabilities which reduce power consumption based on the level required to adequately control a computer. This results in extended battery life while maintaining adequate performance. Dynamic adjustment of transmission power based on need further conserves battery life.
- US Patent No. 5675390 - Home entertainment system combining complex processor capability with a high quality display
An entertainment system has a personal computer as the heart of the system with a large screen VGA quality monitor as the display of choice. The system has digital satellite broadcast reception, decompression and VGA display capability without intermediate translation of digital video signals to NTSC.
- US Patent No. 4,937,737 - Process Transparent Multi Storage Mode Data Transfer and Buffer Control
An interprocess communication facility in a process system provides for communication of data between at least two processes. The facility supports a plurality of different data transfer modes which are provided by storage management services of the processor or processors. A process interface provides a common interface for each communicating process to select data transfer modes independently of the data transfer mode chosen by the other communicating process. A data access control function is coupled to the process interface and to the storage management services. The data access control function controls the use of the storage management services as a function of the transfer modes chosen by the communcating processes. It is transparent to the processes as to which transfer mode was chosen by each other.
- US Patent No. 5,179,703 - Dynamically Adaptive Environment for Computer Programs
Multiple versions of a given system command are run on a single operating system by using one command processing program per command irrespective of its version. Each version of the command has a command definition which has the same format for all counterparts of the command. A command analyzer program transforms the parameters of a command character string into the correct data form for its command processing program based on the command definition for that version of the command. Multiple sets of command definitions are placed in separate storage directories called libraries. The libraries are searched based on a version identifier to find the command definition for a command. The system will dynamically adapt to the vewrsion of each program as it is running.
- US Patent No. 4,819,156 - Database Index Journaling for Enhanced Recovery
A quick recovery of logical files which provide alternative views of databases is provided. Unchanged logical file pages are journaled before being changed. Transactions affecting databases covered by the logical files are also journaled. To recover a logical file, the journaled unchanged pages of the logical file that correspond to the changed pages are inserted back into the logical file, and the transactions that were journaled are processed to provide the changes to the logical file and to the database. This brings the logical file and the underlying database up to date, and in synchronization with each other.
Data Storage Devices
- US Patent No. 4,761,785 - Parity Spreading to Enhance Storage Access
This patent is well known in the industry as the "RAID V" patent. A storage management mechanism distributes parity blocks corresponding to multiple data blocks substantially equally among a set of storage devices. N storage units in a set are divided into a multiple of equally sized address blocks, each containing a plurality of records. Blocks from each storage unit having the same address ranges form a stripe of blocks. Each stripe has a block on one storage device containing parity for the remaining blocks of the stripe. Further stripes also have parity blocks, which are distributed on different storage units. Parity updating activity associated with every change to a data record is therefore distributed over the different storage units, enhancing access characteristics of the set of storage devices. The parity updating activity also includes the use of an independent version number stored with each data record and corresponding version numbers stored with the parity record. Each time a data record is changed, its version number is incremented and the corresponding version number in the parity record is incremented with the parity record update.
- US Patent No. 4,676,672 - Precision Spindle
A spindle assembly has a shaft with at least two axially spaced expandable shaft sections. The expandable shaft sections serve to couple the spindle to a bearing assembly having inner races. The expandable shaft sections are expanded elastically and uniformly into retentive contact with the inner races to provide radial and axial support for the spindle assembly.
- US Patent No. 4,649,519 - Self Biasing Thermal Magneto-Optic Medium
A layer in a magnetic storage medium provides a biasing magnetic field for writing data. The layer exhibits a net magnetization with an orientation in a first direction when the layer is at a temperature below its compensation temperature and a net magnetization with an orientation in a second direction different from the first direction when heated as by a laser to a temperature above its compensation temperature, but below its Curie point temperature.
- US Patent No. 5677878 - Method and Apparatus for Quickly Restoring Digit I/O Lines
A helper flip-flop device is coupled to a pair of I/O DIGIT lines in a DC bias current sensing based dynamic random access memory (DRAM) device for ensuring that one of the DIGIT lines returns to as low a voltage as possible following a memory access. A sense amplifier is coupled to the I/O lines to amplify the differential voltage appearing on the lines following access of a memory cell. The helper flip-flop, when activated at the same time the DC bias is removed, sinks current from the low line to ground, effectively reducing its voltage to near ground to allow faster release of the row access signal.
Communications
- US Patent No. 4,954,965 - Enhanced Frame Utilization for CSMA/CD Communication Protocol
In a CSMA/CD communication protocol, data to be sent from one device on a communication network to another is put into frames, or predetermined sized pieces of information. One of the fields in a frame, the pad field, is used to make the total size of the frame large enough to ensure that a collision anywhere in the network with another frame is detected by the senders. The pad field is further used to identify when a data record will be continued in the next frame and also to identify when multiple data records are being sent in the same frame.
- US Patent No. 4,965,772 - Method and Apparatus for Communication Network Alert Message Construction
The construction and display of operator messages representative of alert conditions in a network is described. Code points, which are strings of bits, are generated in response to an event in a device attached to the network. The code points are used to index predefined tables that contain relatively short units of text messages in operator selectable languages to be used in building an operator's information display. A product attached to a network, an alert sender, will generate a series of code points representative of desired display messages for an operator. The messages are independent of the specific alert sending product insofar as an alert receiver is concerned. The operator can also choose between detailed and general display messages. The code points are hierarchically arranged so that if the alert receiver does not have the most up to date set of messages, the alert receiver will display a more generic message which is still representative of the event.
Electronic Circuits and Sensors
- US Patent No. 5578941 - Voltage Compensating CMOS Input Buffer Circuit
A voltage compensating CMOS input buffer converts input TTL signals to CMOS logic levels, and compensates for changing supply voltage by using a n-channel transistor to vary the effective size ratio of pairs p-channel to n-channel transistors making up an input inverter. The compensating transistor becomes operable with increasing supply voltage to help the n-channel input inverter transistors offset the p-channel input inverter transistors whose trip points would otherwise have been increased by increasing power supply voltage. As the power supply voltage decreases, the compensating transistor turns off, returning the input inverter to its original size ratio. The gate of the compensating transistor is coupled to the supply voltage through two diodes to control the amount of current flowing through the compensating transistor. Further trip point transistors in series with the compensating transistor have their gates coupled to the input signals to help stabilize the trip points. An output stage inverter provides the CMOS logic levels from the output of the input inverter.
- US Patent No. 4,678,937 - Electrical Isolation Circuit
A circuit provides electrical isolation from an input signal which has a leading edge and a trailing edge. On the leading edge of the input signal, a first signal is transmitted across an isolation device (an optical coupler) to provide a first isolated signal representative of the leading edge of the input signal. On the trailing edge of the input signal, a second signal is transmitted across the isolation device to provide a second isolated signal representative of the trailing edge of the input signal. The first and second isolated signals are electrically isolated from and representative of the input signal.
- US Patent No. 4,502,003 - Two Wire Circuit Having an Adjustable Span
A two wire circuit has a total direct current signal proportional to a sensor signal which is to be sensed. The current flows through a first terminal which is coupled to an external power source and load and then through a second terminal. A current controller is coupled to the sensor and across the first and second terminals for controlling the current. A feedback amplifier amplifies a feedback signal which is responsive to the current to provide an amplified feedback signal. A span adjustment is coupled to the feedback amplifier and the current controller for receiving the amplified feedback signal to adjust the amplified feedback signal such that the current is controlled by the current controller as a function of the sensor signal and the adjusted, amplifed feedback signal.
- US Patent No. 4,782,300 - Differential Transceiver With Line Integrity Detection
A differential transceiver transmission line integrity detector detects both open and short circuits in the transmission lines. The two transmission lines are terminated at both ends by selected impedances. A driver coupled to each of the transmission lines drives the lines with data signals. Signal levels on the lines are detected and compared with expected levels to generate line integrity indications. Both open and short conditions are detected and indicated by the line integrity indications.
- US Patent No. 4,545,258 - Circuit With Adjustable Amplitude and Rolloff Frequency Characteristics
An electrical circuit provides an output signal having a frequency representative of an input signal which has a fundamental frequency responsive to a parameter. The circuit has an amplifier having an adjustable amplitude response with an input coupled to the input signal and an output for providing the output signal as a function of the input signal. A filter is coupled to the amplifier and to the output signal for at least partially determining the amplitude response of the amplifier. The filter has an adjustable rolloff frequency characteristic. An adjustable impedance is coupled to the filter to adjust the amplitude response of the amplifier and adjust the rolloff frequency characteristic of the filter as a function of the input signal. A controller is coupled to the output signal and provides a control signal for adjusting the adjustable impedance and hence the amplitude response of the amplifier and the rollof frequency characteristic of the filter as a function of the output signal.
- US Patent No. 4,594,504 - Light Modulation Sensor in a Vortex Shedding Flowmeter
A sensor which provides an ouput signal representative of a parameter such as pressure, includes a reflector, a lens and a waveguide which are relatively movable as a function of the parameter. Light from a light source is transmitted by the waveguide toward the reflector. The lens, which is positioned between the waveguide and the reflector directs the light from the waveguide to the reflector and focuses the reflected light proximate a receiving surface of the waveguide. A sensor housing supports the waveguide, lens and relector so that a relative physical displacement between the waveguide, lens and reflector occurs which is responsive to the parameter. The light received by the waveguide at its receiving surface is a function of the relative physical displacement, and thus a function of the parameter. The waveguide transmits the received light to a light detector which produces an electrical output signal which is a function of the received light and therefore of the parameter.
- US Patent No. 5,680,425 - Self-Queuing Serial Output Port
A multiport switch buffers and transfers cells of digital data. It provides the ability to control the synchronization of the ports in a distributed manner. Each port is associated with a counter that starts counting when transmission by either the port it is associated with is transferring a cell, or when another port is transferring a cell on a channel that conflicts with the channel attached to the port. The counter counts the appropriate number of digits corresponding to the length of the cell whereupon the port is provided with a signal indicating that the transmission has ended. In association with other control signals, the port may then begin transmitting a new cell. When multiple switches are attached to the same channel, the counter serves as a self-queuing mechanism that relieves a central controller from having to keep track of the transmission of bits by each port, and from having to select the next port for transmission.
- US Patent No. 5696456 - Enhanced Low Voltage TTL Interface
A differential transistor pair is used for a Low Voltage Transistor-Transistor Logic (LVTTL) input buffer to provide an input buffer for a modified and enhanced LVTTL specification. The differential input buffer accurately detects high and low voltages which are respectively lower and higher than existing specified LVTTL voltage levels, yet provides output voltages that are representative of intended logic levels. This provides the ability to use the improved input buffer with existing drivers at higher frequencies where the voltage swing provided by the existing drivers do not produce as large a voltage swing as that required by existing LVTTL specifications.
- US Patent No. 5668751 - Antifuse Programming Method and Apparatus
A self-timing antifuse programming controller optimizes programming of one or many antifuses. A programming current through the antifuse is monitored until it reaches a current trip point, thereby initiating a delay period. The delay period is determined by charging a capacitor with a scaled replicate of the antifuse current until a trip point voltage is reached. Antifuses which are more resistive receive a longer programming time. The current trip point and delay period are independently programmable. The antifuse programming controller also flags completion of antifuse programming allowing expeditious programming of further antifuses in an array of antifuses to minimize overall programming time.
- US Patent No. 5666390 - High Speed Programmable Counter
A digital counter allows the provision of start and stop values in order to allow it to be configurable to any length. The counter rolls over to zero at a maximum value and proceeds to count until it reaches an indicated stop count. At that point, it proceeds to the start count and continues counting. The counter counts half bytes of a cell of data for transmission to and from a multiport DRAM in accordance with communication protocols, such as asynchronous transfer mode (ATM.).
Semiconductor
- US Patent No. 5725739 - Low Angle, Low Energy Physical Vapor Deposition of Alloys
An alloy or composite is deposited in a recess feature of a semiconductor substrate by sputtering an alloy or composite target into a recess, to form a first layer of deposited material. The first layer of deposited material is resputtered at a low angle and low energy, to redeposit the first layer of deposited material onto the bottom of the recess as a second layer of deposited material having a different stoichiometry than that of the first deposited material. In a further embodiment, a sputtering chamber ambient is comprised of argon and nitrogen. In yet a further embodiment, the resputtering step is followed by deposition of at least one layer of material with a different stoichiometry than that of the second deposited layer, to form a "graded" stoichiometry of material deposited in the recess.
- US Patent No. 5712186 - Method for Growing Field Oxide to Minimize Birds' Beak Length
A method for forming field oxide isolation regions using oxygen implantation is described. An oxidation resistant layer such as silicon nitride is formed on a silicon substrate, and acts as an oxidation mask. An opening is then formed in the nitride layer, where field oxide is desired. In one embodiment of the invention, oxygen is implanted into this opening, followed by thermal oxidation. In a second embodiment of the invention, the opening is thermally oxidized, followed by a deep oxygen implant and anneal. Encroachment of the field oxide under the nitride layer is decreased, resulting in a minimum "birds' beak" length.
- US Patent No. 5719082 - Angled Implant to Improve High Current Operation of Bipolar Transistors
Method and apparatus for improving the high current operation of bipolar transistors while minimizing adverse affects on high frequency response are disclosed. A local implant to increase the doping of the collector at the collector to base interface is achieved by the use of an angled ion implant of collector impurities through the emitter opening. The resulting area of increased collector doping is larger than the emitter opening, which minimizes carrier injection from the emitter to the collector, but is smaller than the area of the base.
- US Patent No. 5654860 - Well Resistor for ESD Protection of CMOS Circuits
A circuit for providing electrostatic discharge (ESD) protection is disclosed. The circuit comprises a pair of CMOS field effect pull up and pull down transistors with reduced resistance source and drain, having a well resistor formed external to them between supply and ground busses respectively. During an ESD event, the well resistors serve to both limit the current flow through the transistors, and reduce the voltage drop across them.
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